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2010-05-21 NetBSD/evbarm IMX51NETWALKER


Cortex-A8 i.MX51 Manual Errata Chip Errata SHARP NetWalker NetBSD



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NetBSD/evbarm i.MX51
initarm:278
initarm:286
initarm:297
initarm:312
physmemory: 131072 pages at 0x90000000 -> 0xafffffff
freestart = 0x9022e000, free_pages = 130514 (0x0001fdd2)
Allocating page tables
initarm: kernel_l1pt: 0xc0230000:0x90230000
initarm: kernel_pt_table:
        0xc022e000:0x9022e000
        0xc022f000:0x9022f000
        0xc0234000:0x90234000
        0xc0235000:0x90235000
        0xc0236000:0x90236000
        0xc0237000:0x90237000
        0xc0238000:0x90238000
        0xc0239000:0x90239000
        0xc023a000:0x9023a000
        0xc023b000:0x9023b000
FIQ stack: p0x9023d000 v0xc023d000
IRQ stack: p0x9023e000 v0xc023e000
ABT stack: p0x9023f000 v0xc023f000
UND stack: p0x90240000 v0xc0240000
SVC stack: p0x90241000 v0xc0241000
msgbuf   : p0xaffff000
Creating L1 page table at 0x90230000
Mapping kernel
pmap_map_chunk: pa=0x90000000 va=0xc0000000 size=0x1b0000 resid=0x1b0000 prot=0x5 cache=1
SLLLLLLLLLLL
pmap_map_chunk: pa=0x901b0000 va=0xc01b0000 size=0x80000 resid=0x80000 prot=0x3 cache=1
LLLLLLLL
Constructing L2 page tables
pmap_map_chunk: pa=0x9023d000 va=0xc023d000 size=0x1000 resid=0x1000 prot=0x3 cache=1
P
pmap_map_chunk: pa=0x9023e000 va=0xc023e000 size=0x1000 resid=0x1000 prot=0x3 cache=1
P
pmap_map_chunk: pa=0x9023f000 va=0xc023f000 size=0x1000 resid=0x1000 prot=0x3 cache=1
P
pmap_map_chunk: pa=0x90240000 va=0xc0240000 size=0x1000 resid=0x1000 prot=0x3 cache=1
P
pmap_map_chunk: pa=0x90241000 va=0xc0241000 size=0x2000 resid=0x2000 prot=0x3 cache=1
PP
pmap_map_chunk: pa=0x90230000 va=0xc0230000 size=0x4000 resid=0x4000 prot=0x3 cache=2
PPPP
pmap_map_chunk: pa=0x9022e000 va=0xc022e000 size=0x1000 resid=0x1000 prot=0x3 cache=2
P
pmap_map_chunk: pa=0x9022f000 va=0xc022f000 size=0x1000 resid=0x1000 prot=0x3 cache=2
P
pmap_map_chunk: pa=0x90234000 va=0xc0234000 size=0x1000 resid=0x1000 prot=0x3 cache=2
P
pmap_map_chunk: pa=0x90235000 va=0xc0235000 size=0x1000 resid=0x1000 prot=0x3 cache=2
P
pmap_map_chunk: pa=0x90236000 va=0xc0236000 size=0x1000 resid=0x1000 prot=0x3 cache=2
P
pmap_map_chunk: pa=0x90237000 va=0xc0237000 size=0x1000 resid=0x1000 prot=0x3 cache=2
P
pmap_map_chunk: pa=0x90238000 va=0xc0238000 size=0x1000 resid=0x1000 prot=0x3 cache=2
P
pmap_map_chunk: pa=0x90239000 va=0xc0239000 size=0x1000 resid=0x1000 prot=0x3 cache=2
P
pmap_map_chunk: pa=0x9023a000 va=0xc023a000 size=0x1000 resid=0x1000 prot=0x3 cache=2
P
pmap_map_chunk: pa=0x9023b000 va=0xc023b000 size=0x1000 resid=0x1000 prot=0x3 cache=2
P
Mapping the vector page
devmap_bootstrap
devmap: 73fbc000 -> 73fbc0ff @ f3fbc000
pmap_map_chunk: pa=0x73fbc000 va=0xf3fbc000 size=0x100 resid=0x1000 prot=0x3 cache=0
P
switching to new L1 page table  @0x90230000...done.
init subsystems: stacks vectors undefined page pmap irq done.
Loaded initial symtab at 0xc01b41b8, strtab at 0xc01d4608, # entries 7684
pmap_postinit: Allocated 35 static L1 descriptor tables
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
    2006, 2007, 2008, 2009, 2010
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 5.99.29 (IMX51NETWALKER) #48: Fri May 21 20:18:21 JST 2010
        ryo@phenomena:/src/cvs/NetBSD/sys/arch/evbarm/compile/IMX51NETWALKER
total memory = 512 MB
avail memory = 499 MB
cpu_lwp_fork: 0xc01f8e60 0xc254fc80 0xc01f8e60 0xc01f8e60
l1: pcb=0xc0241000 pid=1 pmap=0xc0220ce8
l2: pcb=0xc2712000 pid=0 pmap=0xc0220ce8
cpu_lwp_fork: 0xc01f8e60 0xc254fa00 0xc01f8e60 0xc01f8e60
l1: pcb=0xc0241000 pid=1 pmap=0xc0220ce8
l2: pcb=0xc2716000 pid=0 pmap=0xc0220ce8
cpu_lwp_fork: 0xc01f8e60 0xc254f780 0xc01f8e60 0xc01f8e60
l1: pcb=0xc0241000 pid=1 pmap=0xc0220ce8
l2: pcb=0xc2718000 pid=0 pmap=0xc0220ce8
cpu_lwp_fork: 0xc01f8e60 0xc254f500 0xc01f8e60 0xc01f8e60
l1: pcb=0xc0241000 pid=1 pmap=0xc0220ce8
l2: pcb=0xc271a000 pid=0 pmap=0xc0220ce8
cpu_lwp_fork: 0xc01f8e60 0xc254f280 0xc01f8e60 0xc01f8e60
l1: pcb=0xc0241000 pid=1 pmap=0xc0220ce8
l2: pcb=0xc271c000 pid=0 pmap=0xc0220ce8
cpu_lwp_fork: 0xc01f8e60 0xc254f000 0xc01f8e60 0xc01f8e60
l1: pcb=0xc0241000 pid=1 pmap=0xc0220ce8
l2: pcb=0xc271e000 pid=0 pmap=0xc0220ce8
cpu_lwp_fork: 0xc01f8e60 0xc2552ca0 0xc01f8e60 0xc01f8e60
l1: pcb=0xc0241000 pid=1 pmap=0xc0220ce8
l2: pcb=0xc27b2000 pid=0 pmap=0xc0220ce8
cpu_lwp_fork: 0xc01f8e60 0xc2552a20 0xc01f8e60 0xc01f8e60
l1: pcb=0xc0241000 pid=1 pmap=0xc0220ce8
l2: pcb=0xc27b4000 pid=0 pmap=0xc0220ce8
cpu_lwp_fork: 0xc01f8e60 0xc25527a0 0xc01f8e60 0xc01f8e60
l1: pcb=0xc0241000 pid=1 pmap=0xc0220ce8
l2: pcb=0xc27f8000 pid=0 pmap=0xc0220ce8
cpu_lwp_fork: 0xc01f8e60 0xc2552520 0xc01f8e60 0xc01f8e60
l1: pcb=0xc0241000 pid=1 pmap=0xc0220ce8
l2: pcb=0xc2824000 pid=0 pmap=0xc0220ce8
cpu_lwp_fork: 0xc01f8e60 0xc25522a0 0xc01f8e60 0xc01f8e60
l1: pcb=0xc0241000 pid=1 pmap=0xc0220ce8
l2: pcb=0xc2841000 pid=0 pmap=0xc0220ce8
cpu_lwp_fork: 0xc01f8e60 0xc2552020 0xc01f8e60 0xc01f8e60
l1: pcb=0xc0241000 pid=1 pmap=0xc0220ce8
l2: pcb=0xc2843000 pid=0 pmap=0xc0220ce8
mainbus0 (root)
cpu0 at mainbus0: Cortex-A8 r2p1 (ARM11J core)
cpu0: DC disabled IC disabled WB disabled EABT
cpu0: 0KB/0B 0-way Instruction cache
cpu0: 254KB/256B 4-way write-back-locking-C Data cache
axi0 at mainbus0panic: config_devalloc: tzic


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